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I am measuring the rotational speed of a shaft using a disk with 60 cuts and an optical fork. The signal from the optical fork is sent to a frequency to voltage converter and after that to a data acquisition system.

What is the working principle of this frequency to voltage converter? Is it counting pulses?

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  • $\begingroup$ As a general guide, one method is to provide a pulse of fixed width every time a slot passage occurs. The pulse widths are set such that at maximum pulse rate the output is either JUST 100% or somewhat less than 100%. If the max shaft speed = 600 RPM then max disk RPS = 10 rps so there are 600 pulses per second max. Of each pulse is set to 1 mS wide then at full speed the output is high 0.600 of the time and low 0.400 of the time. If the pulses are 5V high then Vmax = 0.6 x 5V = 3V. So output is 3V at 600 RPM or 3/600 V/RPM or 5 mV per RPM. $\endgroup$ Apr 8, 2016 at 15:52

3 Answers 3

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There are a number of ways.

As Russell described, one way is to make a fixed size pulse each period, then low pass filter the result.

Another is to make a frequency-dependent filter. Feed in a signal with fixed amplitude and varying frequency. The filter varies the amplitude as a function of frequency. You then make a AC to DC amplitude converter, often called a "detector". Such a detector is at the heart of a AM radio, for example.

You can have a bunch of narrowly tuned circuits in parallel, then see which one has the highest response to the input signal.

You can sample the input signal, convert it to digital values, and run a FFT (fast fourier transform) on them.

If you are expecting only a single input frequency, you can tweak a oscillator to attempt to mimic that frequency. If the oscillator is voltage-controlled and you do this in a feedback loop, then the control signal into the oscillator becomes the voltage signal indicating the input frequency. This may sound far fetched, but this method is common enough to have a name. It's called a phase locked loop (PLL), and you can get PLL chips that do most of this for you. Most newer (last 40 years or so) FM radios work on this principle.

Old FM radios used a different technique, called a ratio detector.

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As a general guide:

One method is to provide a pulse of fixed width every time a slot passage occurs.

The pulse widths are set such that at maximum pulse rate the output is either JUST 100% or somewhat less than 100%. For example.
If the max shaft speed = 600 RPM
then max disk RPS = 10 rps
so there are 60 slots x 10 rps = 600 pulses per second max.

If each pulse is set to 1 mS wide
then at full speed the output is high 0.600 of the time and low 0.400 of the time.
If the pulses are set to say 5V high
then Vmax = 0.6 x 5V = 3V.
So, output is 3V at 600 RPM
or 3/600 V/RPM
or 5 mV per RPM.

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TL;DR

The history of FVCs, basically and chronologically, goes as follows:

  • a charge-dispenser made of a voltage limiter, a capacitor, and diodes;
  • Two Op-Amps and capacitor
  • Two Op-Amps and capacitor plus bleed resistor
  • LM131
  • Cascading two or more fast Sallen-Key filters
  • Phase-Locked loop
  • Digital

You don't say which frequency to voltage converter (FVC) you are using, or what it is based upon (LM331, LM131, AD650, ADVFC32, LM2907/LM2917 etc. There are many ways to accomplish frequency to voltage conversion - there are both analogue and digital methods, and within those camps there are again various ways of achieving the same thing.

If you want to see how the FVC came about then here is an interesting historical explanation, from basics: What's All This Frequency-To-Voltage Converter Stuff, Anyhow? It is written by Robert A. Pease, the guy who designed the LM131 for National, so this information is straight from the horse's mouth, so to speak. A PDF is also available from there.

I will attempt to summarize the article below:

Analogue

First Version

Thirty years ago, a guy asked him if he could show him how to make a Frequency-to-Voltage converter (FVC), while he was working at at George A. Philbrick Researches. He designed a charge-dispenser made of a voltage limiter, a capacitor, and diodes. Evidently, it worked pretty well.

Second Version

In 1964 he put a new version into the old Philbrick Applications Manual.

FVC 1965

The first amplifier has a limited output voltage. The p-p voltage across the capacitor is pretty well established:

V p-p = 2Vz + 2Vd - 2Vd

So, the charge (Q = C × V p-p) flows through the feedback resistor of the second amplifier. The output voltage will be, on the average:

Vout = Rf × C × V p-p × f

Third version

A few years later, he got into the Voltage-to-Frequency Converter (VFC) business and at the same time, he came up with an improved circuit for an FVC (see figure 2).

The input comparator is set up to accommodate TTL signals, but if you put a resistor from the + input to -15 V, you can accommodate symmetrical signals; a resistor from the + input to ground will cut down the hysteresis and let you handle small signals.

FVC 1972

The real improvement in this FVC was the bleeder resistor, the 3.3 MΩ added to the right end of the capacitor.

LM131

After he left Philbrick, he joined National and designed the LM131 voltage-to-frequency converter3, using completely different ideas than any of the Philbrick circuits.

It used Q = I × T, rather than the Q = C × V employed by all of the Philbrick ones. It didn't need ±15 V; it could run on +15 or +30 or +12 or +5 V—much easier to apply. BUT, it still had the same constraint when you used it as an F-to-V converter: If you want low ripple, it's hard to get fast response.

Cascading two or more fast Sallen-Key filters

In 1978, he wrote an application note on how to improve the response time of an FVC—in the Linear Apps Handbook.

I showed how to cascade two or more fast Sallen-Key filters to give reasonably quick response, yet filter out the ripple at 24 dB per octave.

Phase-Locked loop

In 1979, he wrote another App Note showing how to use a phase-locked loop to make a quicker F-to-V converter, about 2 ms.

That's about 10 cycles of the new frequency—a further 20:1 improvement.

Digital

Fast clock and digital counter

Recently, a guy asked him how to make a 60-Hz FVC with quick response and negligible lag or delay.

I told him that the standard procedure is to use a fast clock and a digital counter. But the number of counts collected during one period is linearly proportional to the period of the signal, and you might have to do some digital computations to convert that to a signal representing the frequency. Then I realized that a "multiplying" DAC can be used to divide in a reciprocal mode.

He built it up and it worked. This Frequency-to-Voltage converter settles in one cycle of the frequency and uses only a small number of parts.

FVC - CMOS logic

The digital logic generates a couple of pulses at the time of each rising edge of the incoming frequency (you could use some kind of dual one-shot multivibrator, but I didn't have any of those around). The first pulse loads the data from the CD4040 into the DAC (the pulse also disables the path from the clock to the counter to avoid any confusion from rippling in the counter). Then the second pulse resets the counter.

The MDAC has storage registers built in, so the data from the counter is fed right in to the DAC when the WRITE-2-bar pulse is applied. The MDAC isn't connected in the normal way, with the variable resistance in the input path. The fixed resistor is in the input, and the impedance controlled by the Digital code is connected as the feedback resistor. This permits the multiplying DAC to act as a divider, so the reciprocal function is done neatly—not in the digital realm, and not in the analog world, but on the cusp between them. (More on this in a few months). The LM607BN was chosen for the op amp because you need low offset. It's cheap, Vos is only 25 µV typical (60 µV max.), and you don't need a trimmer pot.


I seriously recommend that you read the original article, as my abridged version has, unfortunately, had to leave out most of the salient technical facts.

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    $\begingroup$ Your edits have improved the post, but providing a brief summary at the beginning of your answer would help further as it's still a lengthy post. $\endgroup$
    – user16
    Apr 18, 2016 at 13:34

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