What would happen in real life if you made a paradoxical circuit (a circuit whose output is on iff its output is off). Something like this: Would the discrete model break down and the output end up being analog? Would something else happen?

• This is the basis for clocks. Output depends on propagation delays of components. Depends on an odd number of inversions. Many ASICs connect unused gates on the chip together to form a free running oscillator, which can give an indication of doping process. Aug 30, 2021 at 22:23
• It is likely to settle at half-on and half-off, because these gates are really analog circuits. Aug 31, 2021 at 8:15

If the switch is ON then the OR gate output will turn on. The NOT gate will not affect the OR gate.

If the switch is turned OFF (having been on) then OR will turn off which turns NOT on which turns OR off again and the cycle repeats.

The speed of oscillation will be determined by the propagation delay of the gates.

Would ... the output end up being analog?

Actually, all digital circuits are analogue in that there are ranges of input voltage level which will give a logic 0 and logic 1. The outputs will have some maximum slew rate so that with a suitably fast oscilloscope you can see the rise and fall times.

In this case you might observe that the logic levels do not quite reach the supply rails before being switched the other way. Figure 1. A CircuitLab simulation. (You can try this out on Electronics StackExchange. Figure 2. The results of the CircuitLab time-domain simulation indicate that it will oscillate with a period of 40 ns (25 MHz).

I have no idea how accurate the CircuitLab models are or what logic family they're based on but it gives you an idea of the likely result.

In practice we don't build oscillators like this because of the lack of control of the frequency. With the addition of a resistor and capacitor a predictable time delay can be generated and a more stable frequency generated with less variance with temperature and voltage fluctuations.

• Another problem trying to build this with no timing resistor and capacitor is that if you use CMOS gates for example, they may simply "lock up" with the input and output half way between the power rails. That is bad news, because in that condition the power consumption is high and might be high enough to overheat the chips. FWIW a "ring" of 3 NOT gates with RC connections between them (and a phase shift of 120 degrees in each RC circuit) will make a well-behaved oscillator, if you don't need high accuracy or stability in the frequency. Aug 30, 2021 at 22:04

In actual world, realization of the logic is not absolute binary.
The circuitry is used in actual world, often with additional parts, because of the "negative feedback" nature, but nothing about paradox. The usage depends on the physical characteristics of the devices and parasitic around the circuitry. The operating speed (sensitivity & delay) is interpreted to Gain and Phase. Thus, the circuitry can be an Oscillator or Amplifier. OR-gate in your illustration works as a "gating"/"enable"/"additional gain"/"delay insertion".

Amplifier Oscillator 