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I work with a system in which the microcontroller is exposed to X-ray radiation from time to time. Exactly how much radiation is hard to say... we've never measured it.

Anyway, we've seen a mysterious form of flash corruption on a small sample of our products in which random bits in code space are transitioning from 0 to 1.

We've previously attributed this to power supply issues and the controller not being reset quickly enough while data logging is going on.

But now we may be seeing it on a newer version of our product which has a higher end controller with better brown out protection.

Is it time to consider X-rays as a possible source?

The X-rays would be released due to breaking current high currents with a vacuum interrupter.

Has anyone ever heard of something like this before on nand-flash? Most of the articles I have seen have been with respect to Airport X-rays or X-ray inspection used in PCB FAB

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  • $\begingroup$ What kind of flash is it? (NAND, NOR?) What kind of ECC? (on-board, driver-level, filesystem level?) $\endgroup$
    – Robert Calhoun
    Aug 14, 2015 at 17:11
  • $\begingroup$ This is the flash in the uC it's self - an MSP430F5 series. I am reasonably certain that it is NOR flash (since the code is executing directly from the flash) but I haven't seen anywhere where TI specifically says it is NOR and there is also no mention of any hardware ECC (I would think there would be if it were NAND). TI does recommend software error correction via CRC in safety critical applications (there is a hardware CRC module). We are not using a file system and we have not implemented any software error detecting or correction. $\endgroup$
    – Nick
    Aug 14, 2015 at 18:35
  • $\begingroup$ Basically devices are bricking randomly and when we extract the image we are seeing bit flips and segments that should never be unlocked for flash writes. We've seen in on devices that have been fielded for many years, and we are seeing it on devices that have been fielded for < 1yr. It is a small number relative to our total population. We've yet to find any correlations between the devices. $\endgroup$
    – Nick
    Aug 14, 2015 at 18:39
  • $\begingroup$ Would it be possible to extend power supply dropout time on a selected number of devices and see if any of them fault. The number would need to be large enough that there was a statistically 'good' prospect of a fault occurring at the rate you are seeing with the sample size used || $\endgroup$
    – Russell McMahon
    Aug 15, 2015 at 15:53
  • $\begingroup$ Are the metal "screens" that you use proven to in fact be screens at the energy levels expected as opposed to secondary sources of other particles "excited" by XRAYS. A PIN photo detector may allow you to roughly quantise radiation levels. $\endgroup$
    – Russell McMahon
    Aug 15, 2015 at 15:55

3 Answers 3

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You should definitely consider X-rays as a possible source.

An erased flash is full of 1s. Programming a flash is full of 0s. Over time, or under some stress, flash components may lose their gate charge, which leads to 0 to 1 transition. This is a well known behavior on NAND flash, but may also happen on NOR flash, even if those ones are much more robust by design.

High energy radiations (X rays, gamma rays) are a well known source of stress for flash memories, and it is an important topic for aeronautic, aerospace and nuclear products. See here, there and there my first google results for "cosmic rays NAND".

If the issue is a power cut during program or erase, it may probably occur at any moment during the operation, and you should have some parts with many 0 to 1 transitions, and some with very few. If you always have few bit errors, it's probably something else, such as EMC or radiations.

If yours products have to resist to this kind of stress, ECC, such as Hamming codes, are made for you. Nevertheless, error management in flash memory is a big topic.

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  • $\begingroup$ True, but the reason this is strange to us is that we are not designing a product that goes in space. Our product is quite terrestrial inside of multiple layers of aluminum and steel. The X-ray source is an unintentional radiator of soft x-rays., also see here. Sound's like we will need to get down to brass tacks and try to quantify/measure the radiation level. $\endgroup$
    – Nick
    Aug 14, 2015 at 14:59
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There seem to be plenty of papers suggesting X-rays could be a real problem with NAND flash. I've not read it but the abstract for this one contains actual figures:

Only a few seconds of x-ray exposure corresponding to a total dose of merely 50 rad(Si) in a real-time x-ray source are required to induce errors.

So if your exposure gets anywhere near this level then its not being paranoid to consider the possibility.

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I would suggest this first:

set up an experiment in which the chip is not protected by multiple layers of aluminum and steel and see if the bit corruption rate is measurably worse.

Also set up an experiment where the soft x-ray source is made more intense by decreasing the distance between the chip and the source. Cutting that distance in half will increase the intensity by a factor of four.

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