# In a device tree for AM335x, how do I know what pinctrl values to use?

In the Linux kernel's dtsi file (am335x-bone-common.dtsi) for the AM335x processor, there is the am33xx_pinmux tree, with values like this:

    i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
>;
};


How do I know what values to use for the pinctrl-single,pins entry?

To update your .dts file (that includes the file am335x-bone-common.dtsi) for a pinmux assignment, consult the datasheet to determine which pin(s) are assigned to a function. This is in section 4.3 (broken into subsections per module). Clicking on the hyperlink for a pin (check your package type, ZCE BALL or ZCZ BALL) will take you to the corresponding entry in Table 4-1 (Ball Characteristics). Use Table 4-1 to determine the correct mode to set for that pin.

Then consult the TRM, Table 9-7 (CONTROL_MODULE REGISTERS), on page 1363 for Rev K. The table lists the registers for the default function (likely mode 0). The pin-mux registers start at offset 0x800, and this offset must be subtracted to give the first value in the .dts file. Consult section 9.2.2 (Pad Control Registers) for options for the second value in the .dts file (in addition to the mode setting).

For example, to assign pin C18 of the ZCZ package to SPI1 SCLK, click on the C18 link in table 4-53 of the datasheet (section 4.3.6.5). This takes you to the ECAP0_IN_PWM0_OUT pin in table 4-1. Here you see that a mode value of 4 will select spi1_sclk for that pin.

Then in the TRM, table 9-7 shows conf_ecap0_in_pwm0_out registers start at address 0x964. We must subtract 0x800, so the first value in the .dts is 0x164.

Then we want to select mode 4 (MUXMODE=4). If we also want to enable a pull-up (PULLTYPESEL=1, PULLUDEN=0), then the pad control field is 0x14. The .dts entry would then be:

&am33xx_pinmux {
spi1_pins_s0: spi1_pins_s0 {
pinctrl-single,pins = <
0x164 0x14 /* ecap0_in_pwm0_out.spi1_sclk */
>;
};
};

• Is there any reference about why pin-mux registers start at offset 0x800? Further, there're a lot of registers' address that are lower than 0x800 i.e. CTRL_USB_CTRL0. What about those pinctrl values? Thx. – Adam Aug 23 '18 at 9:07