I am writing a driver for the Samsung K9WAG08U1D NAND flash chip. The specification of the memory chip mentions it has a page size of 2048 bytes (2kB). I am using a TI MSP430F2619 which has 4096 Bytes (4kB) of RAM. This means I need to allocate a 2k memory buffer just to write to flash. My application is a protocol converter and hence requires an additional buffer for handling to and fro transmission. Please suggest me better approach to reduce the RAM requirement due to flash page size.


1 Answer 1


You don't need to fill the page register all in one go.

You begin a page write (i.e. the "Page Program" operation) by writing the Serial Data Input command (0x80), the column address, and the row address. Then you transfer the data to the page register (up to 2112 bytes). This transfer can be broken up into chunks, with any delay between chunks you need.

When you have filled the page register, you begin the transfer from the page register to the array with the Page Program Confirm command (0x10).

  • $\begingroup$ please note that NAND flashs are usually limited to 4 partial write per page $\endgroup$
    – Jacen
    Aug 5, 2015 at 20:15
  • 1
    $\begingroup$ @Jacen I'm not referring to a partial write per page. That is done by a separate command/address/data/command sequence per part. I'm referring to breaking up the transfer to the page register, which can be one "chunk" per byte if necessary. $\endgroup$
    – Patrick
    Aug 5, 2015 at 20:36
  • $\begingroup$ Basically my current driver logic was waiting for entire 2K buffer in RAM to be filled and then writing to flash. But now I can have minimum 1 byte RAM buffer also. $\endgroup$
    – prasad
    Aug 5, 2015 at 21:21
  • $\begingroup$ Oh yes, you are right Patrick, I forgot this option. $\endgroup$
    – Jacen
    Aug 5, 2015 at 21:38

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