Thermal Capacitance - Convention for Modeling of Electrical Equivalent

Question

As an EE, I am very comfortable with the mapping of thermal quantities to their electrical equivalents. However, understanding how thermal capacitances should be connected is driving me crazy.

this example:

Shows a "room" with a thermal resistance and capacitance. There is an external temperature excitation upon which the ambient temperature "rides". Why is it that when the system is modeled electrically, the bottom nodes for the R and C aren't common to one another? Why is it that the C is to the ambient reference, and the R is to the excitation? Shouldn't the C also connect to this excitation?

Answer 1

In this example the point is that you have:

• an insulated (R) room
• with some thermal capacitance (C).

and the idea is that you have an external excitation, ie. you change the temperature of the boundary surface. The thermal resistance is related to the total heat flux (J/s) that enters on exit the system from all boundary walls.

For thermal resistance, the flow of energy is depended on the temperature difference. The thermal capacitance is related to the heat energy (J) stored in the system.

On the other hand, regarding any surplus of energy that enters the enclosed system gets stored and raises the temperature (i.e. raises the internal temperature). However, the accumulated heat energy (capacitance) does not change on the temperature of the boundary; rather it is an integration over time of the excess/deficit of heat flux.

So in terms of the capacitance, you need a fixed temperature point. On the other hand, for the resistance you need the temperature difference which in this example can be adjusted. So in order to compromise what happens in this example, is that the ambient temperature is used as a baseline, while the thermal excitation $\theta_e$ is defined based on the difference between ambient and the outer boundary of the system.