I disassembled a usb wifi adapter. I was surprised to see a 40MHz oscillator, when wifi works at 2.4GHz. How the output of the oscillator is scaled to the required frequency?
Generally when you need to scale up a clock you use a PLL (Phase lock loop).
A very crude explanation is that you have a voltage controlled oscillator at roughly the required frequency. You divide the output of this down to your reference frequency (a factor of 60 in this case) and then compare it to your reference clock input. The difference between the two is then used to adjust the frequency of the voltage controlled oscillator.
The system will take a short time period to lock on and stabilize but after that you end up with a clock which is an exact multiple of the input.
This is glossing over a lot of the details but google for "PLL theory of operation" or similar and you'll find more details than you ever wanted to know.